主要研究方向为智能芯片设计/电子设计自动化，包括新型存算融合智能芯片架构设计、智能芯片编译技术，高层次设计优化、物理设计、片上网络设计、FPGA应用等。2005年毕业于清华大学获博士学位，2005-2012年在日本早稻田大学先后从事博士后和助理教授工作，2012年9月加入图书馆VIP，现为微电子学院副教授，博士生导师。主持国家自然科学基金项目4项，作为骨干参与了多项重大/重点项目的研究工作。相关成果发表SCI论文50余篇（含IEEE/ACM汇刊文章20余篇），会议文章70余篇；申请专利20余项，授权10余项。讲授研究生课程《数字系统设计自动化》，本科生课程《集成电路自动化设计方法》。

• 2019-至今 图书馆VIP 微电子学院，副教授

• 2012-2019 图书馆VIP 信息科学技术学院，轨道制副教授、院聘博导

• 2008-2009 早稻田大学理工学术院，客座讲师

• 2005-2008 早稻田大学理工学术院，客座副研究员

• 2000-2005 清华大学计算机科学与技术系，硕士，博士

• 1996-2000 西安交通大学计算机科学与技术系，学士

• 2023年安徽省教学成果奖特等奖

• 2022年安徽省研究生教学成果奖一等奖

• 2018年图书馆VIP校级“优秀博士学位论文”指导老师

• 2017、2022、2023年全国大学生集成电路创新创业大赛优秀指导老师

• 2013年日本电子信息通信协会（IEICE）最佳学生论文奖 （IEEE/ACM ASPDAC 2013）指导老师

• IEEE 第10届专用集成电路国际学术会议（ASICON 2013）最佳学生论文奖 指导老师

• IEEE 亚州及太平洋地区电路与系统会议（APCCAS 2006） 最佳论文奖

• Junpeng Wang, Mengke Ge, Bo Ding, Qi Xu, Song Chen*, Yi Kang. NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 43(5), pp. 1456-1469, 2024.

• Wenhao Sun, Zhiwei Zou, Deng Liu, Wendi Sun, Song Chen, Yi Kang. Bit-balance: Model-Hardware Co-design for Accelerating NNs by Exploiting Bit-level Sparsity. IEEE Transactions on Computers, 73(1), pp. 152-163, 2024.

• Xiaobing Ni, Mengke Ge, Yongjin Tao, Wendi Sun, Feixiang Duan, Xuefei Bai, Qi Xu, Song Chen, and Yi Kang. BusMap: Application Mapping with Bus Routing for Coarse-Grained Reconfigurable Array. IEEE Transactions on Circuits and Systems II: Express Briefs. 70(8), pp.  3054 - 3058, 2023.

• Qi Xu, Hao Geng, Song Chen, Bo Yuan, Cheng Zhuo, Yi Kang, Xiaoqing Wen, GoodFloorplan: Graph Convolutional Network and Reinforcement Learning Based Floorplanning, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, no. 10, pp. 3492-3502, Oct. 2022.

• Zhimin Lu, Jue Wang, Zhiwei Li, Song Chen and Feng Wu. A Resource-Efficient Pipelined Architecture for Real-Time Semi-Global Stereo Matching. IEEE Transactions on Circuits and Systems for Video Technology, Vol.32, No.2, pp. 660-673, 2022.

• Mengke Ge, Bingxiao Ni, Qi Xu, Jinglei Huang, Song Chen, Yi Kang, Feng Wu, Synthesizing Brain-Network-Inspired Interconnections for Large-Scale Network-on-Chips, ACM Transactions on Design Automation of Electronic Systems, 27(1), 9:1-9:30 2021.

• Qi Xu, Junpeng Wang, Bo Yuan, Qi Sun, Song Chen, Bei Yu, Yi Kang, and Feng Wu, Reliability-Driven Memristive Crossbar Design in Neuromorphic Computing Systems, IEEE Transactions on Automation Science and Engineering (TASE), 20(1), pp. 74-87, 2023.

• Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, and Feng Wu. Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, no. 6, pp. 1191-1204, June 2020.

• Song Chen, Jinglei Huang, Xiaodong Xu, Bo Ding, Qi Xu, “Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, October, Vol.39, No.1, pp.199-212, January 2020.

• Song Chen, Qi Xu, Bei Yu, “Adaptive 3D-IC TSV Fault Tolerance Structure Generation”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 38(5), pp.949-960,2019.

• Qi Xu, Song Chen, Xiaodong Xu, Bei Yu, Clustered Fault Tolerance TSV Planning for 3D Integrated Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 36, No.8, pp. 1287-1300, Aug. 2017.

• Song Chen and T. Yoshimura, “Fixed-outline floorplanning: Enumerating block positions and a new objective function for calculating area costs,” IEEE Transactions on CAD of Integrated Circuits and Systems (TCAD), vol.27, no. 5, pp.858-871, 2008.

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